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Thursday, June 15, 2006 |
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| 8:00 -
9:00 |
Registration (Tutorials are free
to AHS attendees and IEEE Conference on Communications registered attendees,
but registration is required due to limited seating.) |
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Track 1
Location: Besiktas Campus of the Bahcesehir Universy |
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| 9:00 - 10:20 |
Tutorial 1: Evolvable Hardware |
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Tetsuya Higuchi, National Institute of Advanced Industrial Science and Technology
(AIST), Japan |
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Abstract
This tutorial introduces the basic concept of evolvable
hardware and gives the overview of industrial applications of evolvable
hardware,including prothetic hand, data compression, semiconductor
applications. |
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| 10:20 -
10:30 |
Break |
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| 10:30 - 11:50 |
Tutorial 2: High Performance Reconfigurable
Architectures for SoC era |
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Tughrul Arslan, The University of Edinburgh, UK |
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Abstract
The tutorial will provide a review of embedded
reconfigurable architectures targeting
applications with strict power/speed/area constraints. Example
applications will include image processing, telecomunication, aerospace and
speech coding. The tutorial will provide design flow for integrating such
architectures within modern system on chip design methodologies. In addition,
the tutorial will provide an overview of how such architectures can be
reconfigured for applications where on-line real-time adaptation is required
for conditions such as change in
channel environments in the case of telecommunication or environmental
varaition in aerospace. |
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| 11:50 -
12:00 |
Break |
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| 12:00 - 1:20 |
Tutorial 3: Reconfigurable Computing by Reconfigurable Logic |
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Jim Torresen,
University of Oslo, Norway |
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Abstract
Swapping of software processes at run-time has been
common for a long time. However, it has not yet been
very common having hardware being dynamic and adaptable at run-time. With
the recent progress in reconfigurable
technology (typically FPGAs), systems applying run-time
reconfiguration has started to appear. This tutorial will give an
introduction to run-time reconfiguration of hardware and present what is
state-of-the-art today. |
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Track 2
Location: Besiktas Campus of the Bahcesehir Universy |
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| 10:30 -
11:50 |
Tutorial
4: Evolvable Hardware in the View of Theoretical Computer Science |
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Lukas Sekanina, Brno University of Technology, Czech Republic
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Abstract
In this tutorial, the area of evolutionary digital
circuit design and evolvable hardware will be briefly introduced. This mainly
experimental work will be generalized and the concept of evolvable
computational machines will be proposed. Evolvable computational machines
will be defined formally and their properties will be investigated. We will
ask whether the evolved machines are computational mechanisms and whether
they can be simulated on a standard Turing machine. This tutorial presents a
non-traditional view on these topics in which the evolved systems are
considered as computational machines and investigated from the point of view
of theoretical computer science. |
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| 11:50 -
12:00 |
Break |
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| 12:00 - 1:20 |
Tutorial 5: Hardware Accelerators for Evolving Building
Block Modules for Artificial Brains |
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Hugo de Garis,
Wuhan University, China |
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Abstract
Evolution of neural net circuits on inexpensive FPGA hardware
(~$10,000) offers speed-ups by a
factor of about 50 relative to using an ordinary PC. This makes the evolution
of large numbers of modules (~10,000)
each with its own function, doable in a reasonable time. Software to connect
up the modules to build artificial brains is needed and will be in the future
specified according to the designs of human brain architects. The
artificial-brain in the PC could then control the many behaviors of a robot using 2-way radio
antenna, a gripper, a CCD camera on the robot. This may be an affordable
alternative to the using PC clusters with thousands of nodes (e.g. the Blue
Brain project, CCortex project etc). |
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| 1:30 -
2:30 |
Lunch (on
your own) |
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| 2:15 - 6:00 |
Visiting Tour to Dolmbahce Palace
Free tour to the Dolmbahce Palace, a magnificent 19th
centery palace with 14 tons of pure gold used for its interior decoration, a
rich collection of Bohemian crystal in addition to its famous Harem section.
Transportation will be provided from Conference Venue (departure at 2:15pm)
to the Dolmbahce palace and from Dolmbhace palace (departure 6pm) to Welcome
Diner.
Visit our Tours and Excursions on your own are
also available on the Web Site: http://www.ahs2006.org/tours.php |
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| 7:00 -
9:00 |
Welcome Diner
Come and enjoy Classical Turkish music and cuisine in an
authentic Turkish venue (free for registered attendees of AHS-2006). After
diner, transportation will be provided from the Restaurant to Taksim area
(Hilton, Swissotel, Tashik, Macka hotels).
Location: Sehzade Mehmed Sofrasi |
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