7:30–9:30 PM Friday, June 16, 2006
Short Papers/Posters Presentation
Chair: Nizamettin Aydin, Bahçeşehir University, Turkey
Each author will give a 5 minutes overview of his poster. 
07:30 PM Adrian Stoica, Ricardo S. Zebulum, Didier Keymeulen, Rajeshuni Ramesham, JPL, USA, Joseph Neff, SPAWAR, USA, and Srinivas Katkoori, University of South Florida, USA
Temperature-Adaptive Circuits on Reconfigurable Analog Arrays
07:35 PM Mustafa Keskin and Nurcan Keskin, Qualcomm Inc., USA
A Tuning Technique for Switched-Capacitor Circuits		  
07:40 PM Nizamettin Aydin, Bahcesehir University, Turkey and Tughrul Arslan, University of Edinburgh, UK
Power Driven Reconfigurable Complex Continuous Wavelet Transform Processor
07:45 PM Remzi Arslanalp and Abdullah T. Tola, Pamukkale University, Turkey
A New State Space Representation Method for Adaptive Log Domain Systems
07:50 PM Shengmin Ge and Hao Cheng, Harbin Institute of Technology, China
A Comparative Design of Satellite Attitude Control System with Reaction Wheel
07:55 PM Selcuk Okdem and Dervis Karaboga, Erciyes University, Turkey
Routing in Wireless Sensor Networks Using Ant Colony Optimization
08:00 PM Ioannis Nousias and Tughrul Arslan, University of Edinburgh, UK
Wormhole Routing with Virtual Channels Using Adaptive Rate Control for Network-on-Chip (NoC)
08:05 PM Nasri Sulaiman and Ahmet T. Erdogan, University of Edinburgh, UK
A Multi-objective Genetic Algorithm for On-Chip Real-Time Adaptation of a Multi-carrier Based Telecommunications Receiver
08:10 PM Steffen Toscher, Thomas Reinemann, and Roland Kasper, University of Magdeburg, Germany
An Adaptive FPGA-Based Mechatronic Control System Supporting Partial Reconfiguration of Controller Functionalities
08:15 PM Xue-song Yan, Wei Wei, Rui Liu, San-you Zeng, and Li-shan Kang, China University of Geosciences, China
Designing Electronic Circuits by Means of Gene Expression Programming
08:20 PM Sajid Baloch, Tughrul Arslan, University of Edinburgh, UK and Adrian Stoica, JPL, USA
An Efficient Technique for Preventing Single Event Disruptions in Synchronous and Reconfigurable Architectures
08:25 PM Didier Keymeulen, Ricardo Zebulum, Ramesham Rajeshuni, Adrian Stoica, JPL, USA, Srinivas Katkoori, University of South Florida, USA, Sharon Graves, Frank Novak, and Charles Antill, NASA LaRC, USA
Self-Adaptive System Based on Field Programmable Gate Array for Extreme Temperature Electronics
08:30 PM Robert Ross and Richard Hall, La Trobe University, Australia
A FPGA Simulation Using Asexual Genetic Algorithms for Integrated Self-Repair
08:35 PM Stefanos Skoulaxinos, Heriot-Watt University, UK
SW-HW Co-design and Fault Tolerant Implementation for the LRID Wireless Communication System
08:40 PM H. J. Kadim, Liverpool JM University, UK
Analytical Modelling of Power Attenuation under Parameter Fluctuations with Applications to Self-Test and Repair
08:45 PM Savio Chau, Van Dang, Joseph Xu, and James Lu, JPL, USA
An Automatic Technique to Synthesize Avionics Architecture
08:50 PM Katarina Paulsson, Michael Hübner, and Jürgen Becker, Universitaet Karlsruhe, Germany
Strategies to On-Line Failure Recovery in Self-Adaptive Systems Based on Dynamic and Partial Reconfiguration
08:55 PM Jim Torresen and Jonas Jakobsen, University of Oslo, Norway
An FPGA Implemented Processor Architecture with Adaptive Resolution
09:00 PM Lukas Sekanina, Lukas Starecek, Zbysek Gajda, and Zdenek Kotasek, Brno University of Technology, Czech Republic
Evolution of Multifunctional Combinational Modules Controlled by the Power Supply Voltage
09:05 PM John Maher, Colin Mullaney, and Fearghal Morgan, NUI Galway, Ireland
A Platform for Digital Intrinsic Hardware Evolution