5:20-8:30	Thursday, June24, 2004 Technical Posters Session
Naofumi Homma, Takafumi Aoki, and Tatsuo Higuchi, Tohoku University, Japan Multiplier Block Synthesis Using Evolutionary Graph Generation
Ganesh K. Venayagamoorthy and Venu G. Gudise, University of Missouri, USA Swarm Intelligence for Digital Circuits Implementation on Field Programmable Gate Arrays Platforms
Mihai Oltean and Crina Grosan, Babeş-Bolyai University, Romania Evolving Digital Circuits Using Multi Expression Programming
A. Shanthi, P. Muruganandam, and Ranjani Parthasarathi, Anna University, India Enhancing the Development Based Evolution of Digital Circuits
Ju Hui Li, Meng Hiot Lim, and Qi Cao, Nanyang Technological University, Singapore An Intrinsic Evolvable and Online Adaptive Evolvable Fuzzy Hardware Scheme for Packet Switching Network
Jorge Luís M. do Amaral, José Franco M. do Amaral, Ricardo Tanscheit, and Marco Aurélio C. Pacheco, UERJ - Rio de Janeiro State University, Brazil An Immune Inspired Fault Diagnosis System for Analog Circuits Using Wavelet Signatures
Adrian Stoica, Didier Keymeulen, Tughrul Arslan, Vu Duong, Ricardo S. Zebulum, Michael I. Ferguson, and Xin Guo, Jet Propulsion Laboratory, USA Circuit Self-Recovery Experiments in Extreme Environments
Alex Nugent, Garret. Kenyon, and Reid Porter, Los Alamos, NM, USA Unsupervised Adaptation to Improve Fault Tolerance of Neural Network Classifiers
Alexander S. Klyubin, Daniel Polani, and Chrystopher L. Nehaniv, University of Hertfordshire, UK Organization of the Information Flow in the Perception-Action Loop of Evolved Agents
James Hereford and David A. Gwaltney, Murray State University, USA
Design Space Issues for Intrinsic Evolvable Hardware
Gianluca Tempesti, Swiss Federal Institute of Technology at Lausanne, Switzerland
Processor Architectures for Ontogenesis
André Stauffer, Daniel Mange, Enrico Petraglio, and Gianluca Tempesti,
Swiss Federal Institute of Technology, Switzerland
Self-Replication of 3D Universal Structures